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uPLC Registers
| Parameter | Description | Data type |
| 8674 | Constant value = -1 | int16 |
| 8675 | Constant value = 0 | int16 |
| 8676 | Constant value = 1 | int16 |
| 8677 | Constant value = 2 | int16 |
| 8678 | Constant value = 10 | int16 |
| 8679 | Constant value = 100 | int16 |
| 8680 | Constant value = 1000 | int16 |
| 8681 | Constant value = 1024 | int16 |
| 8682 | Constant value = 4096 | int16 |
| 8683-8700 | Free parameters area | int16 |
| 8026 | PLC activation: 0→ program not executed, 1→ program executed | int16 |
| 8027 | Number of valid instruction in the PLC | uint16 |
| 8028 | First timer, every 6 msec, if 8028 is not 0, it is decremented, if it is equal to 0, the bit 0 of parameter 8671 is set to 1 | int16 |
| 8029 | Second timer, very 6 msec, , if 8029 is not 0, it is decremented, if it is equal to 0, the bit 1 of parameter 8671 is set to 1 | uint8 |
| 8671 | Status of timers: bit 0→timer1, bit 1→timer2 or status of last operation: bit 2→negative result, bit 3→zero result | int16 |
| 8672 | Force a double word operation: When the unit is powered on, this is 0. If it is set to 1, the first mathematical operation executed by the uPLC is done by using three double word type operands. After the execution of the operation 8672 is automatically set to 0. The double word result of the mathematical operation is plitted into two adiacent register of 16bits. If the result parameter PC is set to 8683, the double word result is splitted into 16bit registers⇒ 8683 (LSB) and 8684 (MSB) | int16 |
| 4620 | Status of digital inputs | int16 |
| 4621 | Status of digital outputs | int16 |